Gate-Level Superconductor Integrated Circuit Fabrication Process Modelling for Improved Layout Extraction

Publication source: 
Thesis presented in partial fulfilment of the requirements for the degree of Master of Engineering (Electronic)
Publication authors: 
Heinrich Frederick Herbst
Scope of application: 
Physics
Organizations of authors: 
Stellenbosch University
Country: 
South Africa
Year of publication: 
2021